PortaPortese
‹ Cerca opportunità

Manager, Product and Test Engineering

Allegro Microsystems cerca Manager, Product and Test Engineering a Milano. Settore: Tecnici e periti. Sotto c’è il testo dell’offerta.

Overview

In this role you lead a high-performing Test Engineering team in Milan, owning test strategy, silicon validation, and transition to production for high-voltage semiconductor products. You will drive DFT collaboration, ATE hardware/software development, and product characterization to ensure quality and manufacturability. You will influence cross-functional teams and global manufacturing partners to optimize yields and reliability in a fast-paced, automotive-focused environment. This is a hands-on leadership role with a direct impact on product release quality and operational excellence.

Retribuzione / Benefits

Total Rewards package

base salary plus bonus

local market alignment

competitive compensation

career development

annual review tied to performance

Responsabilità

Lead and grow a team of Test Development and Product Engineers

Define and implement wafer probe and final packaged test strategies for high-voltage ICs

Oversee ATE load boards, probe cards, and test programs using Teradyne ETS/Eagle 364 or similar

Collaborate with IC Design and Systems Engineering to define DFT methods (digital scan, Iddq, SHOVE, Gate

Stress)

Drive Silicon Review and full electrical characterization across temperature and process corners

Ensure smooth Pre-Production Release to Release to Production per automotive/industrial standards

Partner with global manufacturing and foundry teams to monitor yields and drive yield improvements

Requisiti fondamentali

8+ years in semiconductor Test Engineering

Experience leading or supervising engineering teams

Strong background in analog, mixed-signal, or high-voltage power IC testing

Strategic communicator

Collaborative builder across geographies and functions

Problem solver with analytical mindset

ATE test program development

Hardware design for test boards (schematics, PCB layout)

High-voltage testing challenges (isolation barriers, partial discharge, transient measurements)

Candidati ora

Il pulsante apre la pagina ufficiale in un’altra scheda. Questa pagina non invia la candidatura.